IBM’s 3D chip stacking process could revive a famous rule on computing power

[jim bell]

IBM’s 3D chip stacking process could revive a famous rule on computing power 
https://share.newsbreak.com/1epjejbm

IBM Research and Tokyo Electron (TEL) collaborated on a new breakthrough in 3D chipmaking that uses a novel method to keep Moore's Law in motion.

The two companies partnered on a chipmaking innovation that simplifies the process for producing wafers with 3D chip stacking technology, a press statement reveals.

They announced that they successfully implemented the new process for producing 300 mm silicon chip wafers for 3D chip stacking technology. It is the world's first 300 mm level example of this technology.New chip-stacking process uses laser invisible to silicon

Chip stacking typically requires vertical connections between layers of silicon, called through-silicon vias (TSVs). The layers are usually extremely thin, having a thickness of less than 100 microns.

During the production process, each of these wafers is attached to a carrier wafer, which is usually made of glass that is temporarily bonded to the silicon. Once the wafer is processed, the glass carrier is then removed from the silicon with the use of ultraviolet lasers.

IBM and TEL's new process uses a 300 mm module with an infrared laser that carries out a debonding process. This process is transparent to silicon, meaning it allows standard silicon wafers to be used instead of glass wafers for the carrier. This means that silicon wafers can be bonded to other pieces of silicon, meaning glass carriers are no longer necessary in the manufacturing process.


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